Steve Casselman

Steve Casselman has 30+ years in the reconfigurable computing field. He was CTO at DRC Computers for 9 years. He has 14 issued patents in reconfigurable computing, including the “runtime generation” patent, the “FPGA in processor socket” patent and FPGA plus CPU on one die patent. He led teams that created products with many design wins. Cray computer OEMed one of the systems he designed. He has architected 4 generations of both software runtimes and hardware operating systems used in reconfigurable computing systems. He has been on international program committees including FCCM, FPL, RAW, and ARC. Steve Casselman has a BA degree in Mathematics from UCLA.